About

I’m Sathvik Swaminathan, a Silicon Design Engineer at AMD. Previously a Research Scientist at Intel Labs.

My background is CPU performance analysis and memory management in tiered memory systems. I’m now learning GPUs, and this site is where I document that.

LinkedIn | Resume (PDF)

Publications

• TierTrain: Proactive Memory Tiering for CPU-based DNN Training ISMM 2025. With Sandeep Kumar, Aravinda Prasad and Sreenivas Subramoney, Intel Labs.

• Exploiting Page Faults for Covert Communication arXiv:2509.20398, BITS Pilani.

Patents

• Proactive Bandwidth-Aware Memory Tiering for Efficient LLM Inference
• Context-Aware Memory Tiering for Machine Learning Training